Career Center

The Role:

The candidate will be a member of the Memory I/O design team designing High Speed IO circuits and implementation of DDR IPs. The focus of the activity will be centered around the circuit design of analog/digital blocks.

The Person:

•              Strong Circuit design fundamentals & scripting knowledge

•              Effective communication skills

•              Enthusiastic team-first mentality

Responsibilities:

•              Design circuits for High Speed IOs that include Transmitter, Receiver – CTLE/DFE, DLL, DAC, OpAmp, Comparator and voltage regulators.

•              Work closely with various disciplines, especially Analog Mixed Signal design, Digital Design and Firmware, as well as Design Verification to ensure optimal implementation of the overall PHY architecture and algorithms and full coverage of the features

•              Participate and contribute to the definition of development flows that improve efficiency and quality of execution

Preferred Skilled Sets:

•              A proven successful track record in circuit design for High Speed IOs

•              Good knowledge of IO and system integration (signaling/equalization techniques, signal integrity, power integrity).

•              Ability to dig into RTL or FW code supporting the custom circuit implementation.

Education Requirements

•              Bachelors, Masters or PHD in Electrical or Computer Engineering